You can easily switch between using an existing C version of a task and an existing VHDL equivalent simply by placing the task on a DSP or on an FPGA. The Diamond IDE will automatically use the correct implementation.

This makes it possible to use C to develop the DSP side of an application in parallel with the slower development of FPGA tasks in VHDL. A C version can be built quickly and used to validate the application while the VHDL version is being created. Once the VHDL implementation is ready, just change the placement of the task from the DSP to the FPGA and rebuild the application.